DAPU CSO gave a keynote at SmartCom 2016 Conference


SmartCom 2016:

Dec. 17th-19th, 2016, Shenzhen, China, Shenzhen University

Links: http://csis.pace.edu/BigDataSecurity/sc2016/keynote.htm

Prof. Qing Yang

IEEE Fellow, Distinguished Engineering Professor,

University of Rhode Island, USA

Bio: Qing Yang is Distinguished Engineering Professor in the Department of Electrical, Computer, and Biomedical Engineering at University of Rhode Island where he has been a faculty member since 1988. He is a director of High Performance Computing Lab (HPCL) of URI and is a recipient of 8 accomplishment awards while serving at URI such as Faculty Excellence Award, Distinguished Engineering Professor Award, Outstanding Intellectual Property Award. His research interests include computer architectures, memory and storage systems, computer networks, embedded computer systems and applications in neural-machine interface and biomedical engineering. He has published over 100 high quality technical articles in these research fields and held over a dozen issued patents and over a dozen pending applications. Majority of his patents have been licensed to computer industry with significant practical impact. Four high tech startup companies have been formed based on his patents. His latest startup, VeloBit, was based on his newly proposed concept: Content Locality, and was successfully acquired by Western Digital in July 2013. He has graduated 11 PhD students, of whom 4 are faculty members at major universities and others are leading researchers in computer companies such as Intel, Xerox, and EMC.

Yang is a Fellow of IEEE. He has served in the professional society in various capacities including general chair of the ACM/IEEE International Symposium on Computer Architecture (ISCA2011), IEEE international Conference on Network, Architecture, and Storage (NAS), IEEE Workshop on Storage Network Architecture and Parallel I/Os (SNAPI); IEEE Distinguished Speaker; Editor of IEEE Transactions; and Program Committee member of numerous international conferences. Besides being a principal investigator of many academic research projects, Yang has also done collaborative research with IBM, Intel, EMC, Freescale, and several startup companies in the Boston area. He received his B.Sc. in computer science from Huazhong University of Science and Technology, Wuhan, China, in 1982, M.A.Sc. in electrical engineering from University of Toronto, Canada, in 1985, and Ph.D degree in computer Engineering from The Center for Advanced Computer Studies, University of Louisiana, Lafayette, in 1988.

Topic: Introducing DPU----Data-storage Processing Unit---Placing Intelligence in Storage

Abstract (PDF): Cloud computing and big data applications require data storage systems that deliver high performance reliably and securely. The central piece, the brain, of a storage system is the central controller that manages the storage. However, all existing storage controllers have their limitations such as for flash memory only, for interface control only, for fault-tolerance only, and so forth. As the data become larger, more storage technologies emerge, and applications spread wider, the existing controllers cannot keep pace with the rapid growth of big data.

We introduce and are currently building a storage controller with built in intelligence, referred to as DPU for Data-storage Processing Unit, to manage, control, analyze, and classify big data at the place where they are stored. The idea is to place sufficient intelligence closest to the storage devices that are experiencing revolutionary changes with the emergence of storage class memories such as flash, PCM, MRAM, Memristor and so forth. Machine learning logics are a major part of DPU that learn I/O behaviors inside the storage to optimize performance, reliability, and availability. Advanced security techniques are implemented inside a storage device. Deep learning techniques train and analyze big data inside a storage device and reinforcement learning optimizes storage hierarchy. Parallel and pipelining techniques are utilized to process stored data exploiting the inherent parallelism inside SSD. Our preliminary experiment data showed promising results that could potentially change the landscape of storage market.